The following commonly assigned United States patent applications relate to and further describe other aspects of the implementations disclosed in this application and are hereby incorporated fully by reference into the present application:
U.S. patent application Ser. No. 13/018,780 “III-Nitride Power Device with Solderable Front Metal,” filed on Feb. 1, 2011, and issued as U.S. Pat. No. 8,399,912;
U.S. patent application Ser. No. 09/780,080 “Vertical Conduction Flip-Chip Device with Bump Contacts on Single Surface,” filed on Feb. 9, 2001, and issued as U.S. Pat. No. 6,653,740;
U.S. patent application Ser. No. 09/819,774 “Chip Scale Surface Mounted Device and Process of Manufacture,” filed on Mar. 28, 2001, and issued as U.S. Pat. No. 6,624,522; and
U.S. patent application Ser. No. 11/372,679 “Hybrid Semiconductor Device,” filed on Mar. 10, 2006, and issued as U.S. Pat. No. 8,017,978.